4#if EIGEN_ARCH_ARM && EIGEN_COMP_CLANG
11 : gebp_traits<float,float,false,false,Architecture::Generic,GEBPPacketFull>
18 "vmla.f32 %q[r], %q[c], %q[alpha]"
25 template <
typename LaneIdType>
28 const LaneIdType&)
const {
32 template <
typename LaneIdType>
35 const LaneIdType& lane)
const {
36 madd(
a,
b.get(lane),
c, tmp, lane);
46 : gebp_traits<float,float,false,false,Architecture::Generic,GEBPPacketFull>
76 c = vfmaq_n_f32(
c,
a,
b);
83 { madd_helper<0>(
a,
b,
c); }
85 { madd_helper<1>(
a,
b,
c); }
87 { madd_helper<2>(
a,
b,
c); }
89 { madd_helper<3>(
a,
b,
c); }
95 #if EIGEN_COMP_GNUC_STRICT && !(EIGEN_GNUC_AT_LEAST(9,0))
98 if(LaneID==0)
asm(
"fmla %0.4s, %1.4s, %2.s[0]\n" :
"+w" (
c) :
"w" (
a),
"w" (
b) : );
99 else if(LaneID==1)
asm(
"fmla %0.4s, %1.4s, %2.s[1]\n" :
"+w" (
c) :
"w" (
a),
"w" (
b) : );
100 else if(LaneID==2)
asm(
"fmla %0.4s, %1.4s, %2.s[2]\n" :
"+w" (
c) :
"w" (
a),
"w" (
b) : );
101 else if(LaneID==3)
asm(
"fmla %0.4s, %1.4s, %2.s[3]\n" :
"+w" (
c) :
"w" (
a),
"w" (
b) : );
103 c = vfmaq_laneq_f32(
c,
a,
b, LaneID);
110struct gebp_traits <double,double,false,false,Architecture::
NEON>
111 : gebp_traits<double,double,false,false,Architecture::Generic>
116 float64x2_t B_0, B_1;
126 dest.B_0 = vld1q_f64(
b);
127 dest.B_1 = vld1q_f64(
b+2);
145 c = vfmaq_n_f64(
c,
a,
b);
152 { madd_helper<0>(
a,
b,
c); }
154 { madd_helper<1>(
a,
b,
c); }
156 { madd_helper<2>(
a,
b,
c); }
158 { madd_helper<3>(
a,
b,
c); }
161 template <
int LaneID>
164 #if EIGEN_COMP_GNUC_STRICT && !(EIGEN_GNUC_AT_LEAST(9,0))
167 if(LaneID==0)
asm(
"fmla %0.2d, %1.2d, %2.d[0]\n" :
"+w" (
c) :
"w" (
a),
"w" (
b.B_0) : );
168 else if(LaneID==1)
asm(
"fmla %0.2d, %1.2d, %2.d[1]\n" :
"+w" (
c) :
"w" (
a),
"w" (
b.B_0) : );
169 else if(LaneID==2)
asm(
"fmla %0.2d, %1.2d, %2.d[0]\n" :
"+w" (
c) :
"w" (
a),
"w" (
b.B_1) : );
170 else if(LaneID==3)
asm(
"fmla %0.2d, %1.2d, %2.d[1]\n" :
"+w" (
c) :
"w" (
a),
"w" (
b.B_1) : );
172 if(LaneID==0)
c = vfmaq_laneq_f64(
c,
a,
b.B_0, 0);
173 else if(LaneID==1)
c = vfmaq_laneq_f64(
c,
a,
b.B_0, 1);
174 else if(LaneID==2)
c = vfmaq_laneq_f64(
c,
a,
b.B_1, 0);
175 else if(LaneID==3)
c = vfmaq_laneq_f64(
c,
a,
b.B_1, 1);
ArrayXXi a
Definition Array_initializer_list_23_cxx11.cpp:1
#define EIGEN_STRONG_INLINE
Definition Macros.h:917
Scalar Scalar * c
Definition benchVecAdd.cpp:17
Scalar * b
Definition benchVecAdd.cpp:17
EIGEN_STRONG_INLINE void loadRhsQuad(const RhsScalar *b, RhsPacket &dest) const
Definition GeneralBlockPanelKernel.h:494
_RhsScalar RhsScalar
Definition GeneralBlockPanelKernel.h:422
conditional< Vectorizable, _RhsPacket, RhsScalar >::type RhsPacket
Definition GeneralBlockPanelKernel.h:461
ResPacket AccPacket
Definition GeneralBlockPanelKernel.h:466
EIGEN_STRONG_INLINE void loadRhs(const RhsScalar *b, RhsPacketType &dest) const
Definition GeneralBlockPanelKernel.h:474
EIGEN_STRONG_INLINE void madd(const LhsPacketType &a, const RhsPacketType &b, AccPacketType &c, RhsPacketType &tmp, const LaneIdType &) const
Definition GeneralBlockPanelKernel.h:512
conditional< Vectorizable, _LhsPacket, LhsScalar >::type LhsPacket
Definition GeneralBlockPanelKernel.h:460
EIGEN_STRONG_INLINE void acc(const AccPacket &c, const ResPacket &alpha, ResPacket &r) const
Definition GeneralBlockPanelKernel.h:533
EIGEN_STRONG_INLINE void updateRhs(const RhsScalar *b, RhsPacketType &dest) const
Definition GeneralBlockPanelKernel.h:485
QuadPacket< RhsPacket > RhsPacketx4
Definition GeneralBlockPanelKernel.h:465
conditional< Vectorizable, _ResPacket, ResScalar >::type ResPacket
Definition GeneralBlockPanelKernel.h:462
RealScalar alpha
Definition level1_cplx_impl.h:147
@ NEON
Definition Constants.h:476
@ GEBPPacketFull
Definition GeneralBlockPanelKernel.h:19
__vector float Packet4f
Definition PacketMath.h:30
Namespace containing all symbols from the Eigen library.
Definition bench_norm.cpp:85
Definition BandTriangularSolver.h:13